DS3254N is DALLAS [Dallas Semiconducotr] company product |
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![]() DS3254N PDF Download |
File Size : | 925.55 KB |
| Manufacturer: | DALLAS [Dallas Semiconducotr] | |
| Description: |
...adapts to coaxial cable losses from 0 to 15dB, which translates into 0 to 380 meters (DS3), 0 to 440 meters (E3), or 0 to 360 meters (STS-1) of coaxial cable (AT&T 734A or equivalent). The AGC and the equalizer work simultaneously but independently to supply a signal of nominal amplitude and pulse shape to the clock and data recovery block. The AGC/equalizer block automatically handles direct (0 meters) monitoring of the transmitter ... ... 8.4 Clock and Data Recovery (CDR) The CDR block takes the amplified, equalized signal from the AGC/equalizer block and produces separate clock, positive data, and negative data signals. The CDR operates from the LIU?s master clock. See Section 12 for more ... ... The jitter attenuator requires a transmission-quality master clock (i.e., g17720ppm frequency accuracy and low jitter). When enabled in the receive path, the JA can obtain its master clock from the appropriate MCLK pin, from the clock adapter block, or from the TCLK pin. When enabled in the transmit path, the JA can take its master clock ... |
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