Description:
...ADV Burst Address Advance Input SynchronousADSCAddress Status (Cache Controller) Input SynchronousADSP Address Status (Processor) Input Synchronous... ...ZZ Sleep Mode Input AsynchronousI/O0-I/O31, I/OP1-I/OP4 Data Input / Output I/O SynchronousVDD, VDDQ Core Power, I/O Power Supply N/AVSS Ground Supply N/A... ...the next output data in the burst sequence of the base address Az, etc. where A0 and A1 are advancing for the four word burst in the sequence defined by the state of the LBO input....