PDF for SII141
SII141 is ETC [ETC] company product |
||
 SII141 PDF Download |
File Size : | 84.83 KB |
| Manufacturer: | ETC [ETC] | |
| Description: |
... The SiI141B is pin for pin compatible with the SiI141 but includes two new features, HSYNC de-jitter and power down when the clock is inactive. ... ...jitter is enabled, the circuitry will introduce anywhere from 0 to 7 CLK delays in the HSYNC signal relative to the output data. The SiI141B includes a new power saving feature, power down with clock detect circuit. The SiI141B will go into a ... ...to enable or disable this capability (a reserved pin tied high on the SiI141). Tying this pin low enables the HSYNC de-jitter circuitry while tying it high disables the circuitry. The HSYNC de-jitter circuitry operates normally with most VESA standard timings. Some DOS mode resolutions do not have timings that are a multiple of eight (HSYNC and VSYNC total times and front and back porch times are multiples of eight pixel times). If they are not a multiple ... |
|
| Similar items with "SII141" : SII141B, SII150A, SiI150ACT100, SII154, More... | ||
RFQ/Buy SII161BCT100
|
|
